summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2017-02-23 14:52:45 +0100
committerPaul Fertser <fercerpav@gmail.com>2017-02-24 09:54:46 +0000
commit77189db85630cef21a4887a9b1c15dac3fd48473 (patch)
treea44c1ae9f1af81e7431f8a09c1586b3b01139071
parent9981093ce076a388700b2f307a9dc79e14a6e0f1 (diff)
tcl: add Hi6220 target and LeMaker HiKey board config
configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3 used for power management. Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4009 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
-rw-r--r--tcl/board/lemaker_hikey.cfg26
-rw-r--r--tcl/target/hi6220.cfg56
2 files changed, 82 insertions, 0 deletions
diff --git a/tcl/board/lemaker_hikey.cfg b/tcl/board/lemaker_hikey.cfg
new file mode 100644
index 0000000..d724440
--- /dev/null
+++ b/tcl/board/lemaker_hikey.cfg
@@ -0,0 +1,26 @@
+#
+# board configuration for LeMaker Hikey
+#
+
+# board does not feature anything but JTAG
+transport select jtag
+
+# SRST-only reset configuration
+reset_config srst_only srst_push_pull
+
+source [find target/hi6220.cfg]
+
+# halt the cores when gdb attaches
+${_TARGETNAME}0 configure -event gdb-attach "halt"
+
+# make sure the default target is the boot core
+targets ${_TARGETNAME}0
+
+proc core_up { args } {
+ global _TARGETNAME
+
+ # examine remaining cores
+ foreach _core [set args] {
+ ${_TARGETNAME}$_core arp_examine
+ }
+}
diff --git a/tcl/target/hi6220.cfg b/tcl/target/hi6220.cfg
new file mode 100644
index 0000000..7daa3c1
--- /dev/null
+++ b/tcl/target/hi6220.cfg
@@ -0,0 +1,56 @@
+# Hisilicon Hi6220 Target
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME hi6220
+}
+
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ set _DAP_TAPID 0x4ba00477
+}
+
+# declare the one JTAG tap to access the DAP
+jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -ignore-version -enable
+
+# declare the 8 main application cores
+set _TARGETNAME $_CHIPNAME.cpu
+set _smp_command ""
+
+set $_TARGETNAME.cti(0) 0x80198000
+set $_TARGETNAME.cti(1) 0x80199000
+set $_TARGETNAME.cti(2) 0x8019A000
+set $_TARGETNAME.cti(3) 0x8019B000
+set $_TARGETNAME.cti(4) 0x801D8000
+set $_TARGETNAME.cti(5) 0x801D9000
+set $_TARGETNAME.cti(6) 0x801DA000
+set $_TARGETNAME.cti(7) 0x801DB000
+
+set _cores 8
+for { set _core 0 } { $_core < $_cores } { incr _core 1 } {
+
+ set _command "target create ${_TARGETNAME}$_core aarch64 \
+ -chain-position $_CHIPNAME.dap -coreid $_core -ctibase [set $_TARGETNAME.cti($_core)]"
+
+ if { $_core != 0 } {
+ # non-boot core examination may fail
+ set _command "$_command -defer-examine"
+ set _smp_command "$_smp_command ${_TARGETNAME}$_core"
+ } else {
+ # uncomment when "hawt" rtos is merged
+ # set _command "$_command -rtos hawt"
+ set _smp_command "target smp ${_TARGETNAME}$_core"
+ }
+
+ eval $_command
+}
+
+eval $_smp_command
+
+# declare the auxiliary Cortex-M3 core on AP #2 (runs mcuimage.bin)
+target create ${_TARGETNAME}.m3 cortex_m -chain-position $_CHIPNAME.dap -ap-num 2 -defer-examine