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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2017-02-17 16:21:41 +0100
committerPaul Fertser <fercerpav@gmail.com>2017-02-24 09:36:06 +0000
commitb73628141a932881953bb816ec7bfa47d9e40680 (patch)
tree95eb18e472d46a7afb759cd31757c290cb089287
parent2861ed533bfadac2b9259540e18c34c505ff2060 (diff)
armv8_dpm: retrieve only necessary registers on halt
to speed up debugging, don't load the complete register context on a halt event, load only those registers that might be clobbered during debugging. Change-Id: I0b58e97aad6f28aefce4a52e870af61e1ef1a44f Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3995 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
-rw-r--r--src/target/armv8_dpm.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index ac53460..e5d10df 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -718,14 +718,22 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
cache = arm->core_cache;
/* read R0 first (it's used for scratch), then CPSR */
- r = cache->reg_list + 0;
+ r = cache->reg_list + ARMV8_R0;
if (!r->valid) {
- retval = dpmv8_read_reg(dpm, r, 0);
+ retval = dpmv8_read_reg(dpm, r, ARMV8_R0);
if (retval != ERROR_OK)
goto fail;
}
r->dirty = true;
+ /* read R1, too, it will be clobbered during memory access */
+ r = cache->reg_list + ARMV8_R1;
+ if (!r->valid) {
+ retval = dpmv8_read_reg(dpm, r, ARMV8_R1);
+ if (retval != ERROR_OK)
+ goto fail;
+ }
+
/* read cpsr to r0 and get it back */
retval = dpm->instr_read_data_r0(dpm,
armv8_opcode(armv8, READ_REG_DSPSR), &cpsr);
@@ -735,7 +743,7 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
/* update core mode and state */
armv8_set_cpsr(arm, cpsr);
- for (unsigned int i = 1; i < cache->num_regs ; i++) {
+ for (unsigned int i = ARMV8_PC; i < cache->num_regs ; i++) {
struct arm_reg *arm_reg;
r = armv8_reg_current(arm, i);