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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2017-02-17 13:57:08 +0100
committerPaul Fertser <fercerpav@gmail.com>2017-02-24 09:30:43 +0000
commite513fe949bdd0d334a373a2e0adb6d9b8c036c69 (patch)
tree9a909f4626a369ce538a5eb2011f3548d02d9707
parent257c434d3ff9a9f7a5d9cec1ed7a2bd1ff82eaf5 (diff)
aarch64: clean up struct aarch64_common
remove some rarely or completely unused components. Change-Id: Id285bb7075901016297fa173a874db7f11a840d7 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3992 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
-rw-r--r--src/target/aarch64.c26
-rw-r--r--src/target/aarch64.h9
2 files changed, 14 insertions, 21 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index da7d2a9..29cbb07 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -331,7 +331,6 @@ static int aarch64_poll(struct target *target)
armv8->debug_base + CPUV8_DBG_DSCR, &dscr);
if (retval != ERROR_OK)
return retval;
- aarch64->cpudbg_dscr = dscr;
if (DSCR_RUN_MODE(dscr) == 0x3) {
if (prev_target_state != TARGET_HALTED) {
@@ -601,22 +600,28 @@ static int aarch64_resume(struct target *target, int current,
static int aarch64_debug_entry(struct target *target)
{
int retval = ERROR_OK;
- struct aarch64_common *aarch64 = target_to_aarch64(target);
struct armv8_common *armv8 = target_to_armv8(target);
struct arm_dpm *dpm = &armv8->dpm;
enum arm_state core_state;
+ uint32_t dscr;
+
+ /* make sure to clear all sticky errors */
+ retval = mem_ap_write_atomic_u32(armv8->debug_ap,
+ armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
+ if (retval == ERROR_OK)
+ retval = mem_ap_read_atomic_u32(armv8->debug_ap,
+ armv8->debug_base + CPUV8_DBG_DSCR, &dscr);
- LOG_DEBUG("%s dscr = 0x%08" PRIx32, target_name(target), aarch64->cpudbg_dscr);
+ if (retval != ERROR_OK)
+ return retval;
+
+ LOG_DEBUG("%s dscr = 0x%08" PRIx32, target_name(target), dscr);
- dpm->dscr = aarch64->cpudbg_dscr;
+ dpm->dscr = dscr;
core_state = armv8_dpm_get_core_state(dpm);
armv8_select_opcodes(armv8, core_state == ARM_STATE_AARCH64);
armv8_select_reg_access(armv8, core_state == ARM_STATE_AARCH64);
- /* make sure to clear all sticky errors */
- retval = mem_ap_write_atomic_u32(armv8->debug_ap,
- armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
-
/* discard async exceptions */
if (retval == ERROR_OK)
retval = dpm->instr_cpsr_sync(dpm);
@@ -625,7 +630,7 @@ static int aarch64_debug_entry(struct target *target)
return retval;
/* Examine debug reason */
- armv8_dpm_report_dscr(dpm, aarch64->cpudbg_dscr);
+ armv8_dpm_report_dscr(dpm, dscr);
/* save address of instruction that triggered the watchpoint? */
if (target->debug_reason == DBG_REASON_WATCHPOINT) {
@@ -717,7 +722,6 @@ static int aarch64_post_debug_entry(struct target *target)
(aarch64->system_control_reg & 0x4U) ? 1 : 0;
armv8->armv8_mmu.armv8_cache.i_cache_enabled =
(aarch64->system_control_reg & 0x1000U) ? 1 : 0;
- aarch64->curr_mode = armv8->arm.core_mode;
return ERROR_OK;
}
@@ -1893,8 +1897,6 @@ static int aarch64_init_arch_info(struct target *target,
armv8->arm.dap = tap->dap;
- aarch64->fast_reg_read = 0;
-
/* register arch-specific functions */
armv8->examine_debug_reason = NULL;
diff --git a/src/target/aarch64.h b/src/target/aarch64.h
index 9491623..c9ec02d 100644
--- a/src/target/aarch64.h
+++ b/src/target/aarch64.h
@@ -48,25 +48,16 @@ struct aarch64_common {
int common_magic;
/* Context information */
- uint32_t cpudbg_dscr;
-
uint32_t system_control_reg;
uint32_t system_control_reg_curr;
- enum arm_mode curr_mode;
-
-
/* Breakpoint register pairs */
int brp_num_context;
int brp_num;
int brp_num_available;
struct aarch64_brp *brp_list;
- /* Use aarch64_read_regs_through_mem for fast register reads */
- int fast_reg_read;
-
struct armv8_common armv8_common;
-
};
static inline struct aarch64_common *